From 255c35572463b41e6b3b34299217e39ec4dd1c09 Mon Sep 17 00:00:00 2001 From: Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com> Date: Tue, 15 Sep 2026 12:39:09 +0100 Subject: Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 87b34ac..2bfd04d 100644 --- a/README.md +++ b/README.md @@ -19,7 +19,7 @@ From my own experience, no matter how much you may like designing PCBs, ultimate 1. **Logic Deduction**: deduce the digital logic function implemented by the provided schematic, purely from the schematic itself (no functional description is given). Deducing this will give you bonus points. 2. **PCB Layout**: design a fully wired, single board PCB implementation of that logic, optimised for the smallest possible board area, within the design constraints below. -This challenge will be running for 7 days, **until midnight of October the 19th.** +This challenge will be running for 7 days, **until the midnight of October 19th.** ## Design Constraints -- cgit v1.2.3