From 1096c9206824952d159097abf91a549e81d76f5e Mon Sep 17 00:00:00 2001
From: Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com>
Date: Tue, 15 Sep 2026 02:14:56 +0100
Subject: Update README.md

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 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'README.md')

diff --git a/README.md b/README.md
index cb7458f..f1e9924 100644
--- a/README.md
+++ b/README.md
@@ -50,7 +50,7 @@ From my own experience, no matter how much you may like designing PCBs, ultimate
 - A board with unresolved DRC errors is disqualified from the size based ranking regardless of its footprint area.
 
 ### Note on High-Speed & Power Rules
-The challenge schematic does not include high speed signal paths (e.g. differential pairs requiring a continuous reference/return plane) or significant power delivery requirements (e.g. wide power traces, stitching vias). As such, no specific high speed routing or power plane rules are imposed in this iteration. Should a future version of the challenge include such elements, this rule set will be updated accordingly.
+The challenge schematic does include a high speed signal paths (a differential pair requiring a continuous reference plane). It does not however have a significant power delivery requirement (e.g. wide power traces, stitching vias). As such, no specific power plane rules are imposed in this iteration. 
 
 ## Judging Criteria
 
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