From ea6e83550b752ad4eb964577b5110b4e1ad3631b Mon Sep 17 00:00:00 2001
From: Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com>
Date: Wed, 14 Oct 2026 08:02:23 +0100
Subject: Update README.md

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'README.md')

diff --git a/README.md b/README.md
index fab867b..69b3197 100644
--- a/README.md
+++ b/README.md
@@ -54,7 +54,7 @@ The keep out zone of the ESP32 antenna does not have to cover any PCB area, it c
 
 ### Trace & Clearance Rules
 - Minimum trace width: 0.15 mm (6 mil).
-- Minimum clearance (trace to trace, trace to pad, trace to via): 0.15 mm (6 mil).
+- Minimum clearance (trace to trace, trace to pad, trace to via): 0.12 mm (6 mil) (changed from 0.15mm to 0.12mm due to the pads of the flip flop being seperated by 0.12mm).
 - Minimum copper to board edge clearance: 0.3 mm.
 - These values should be set as the global minimum in KiCad's Clearance rules so DRC enforces them automatically. We will check the DRC ourselves when judging. 
 
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