From 3790d3b588130668b2d9832a9fe209a65a471ea7 Mon Sep 17 00:00:00 2001
From: Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com>
Date: Wed, 14 Oct 2026 12:31:13 +0100
Subject: Fixed reported schematic and PCB issues

C1-C8, R1 and SW1 and SW3 were not assigned a footprint. Few mistakes with the net labels now resolved Transistors actually have nets.
---
 main/pcb_challenge_final.kicad_pro | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'main/pcb_challenge_final.kicad_pro')

diff --git a/main/pcb_challenge_final.kicad_pro b/main/pcb_challenge_final.kicad_pro
index 916c6ed..a4b1521 100644
--- a/main/pcb_challenge_final.kicad_pro
+++ b/main/pcb_challenge_final.kicad_pro
@@ -645,7 +645,7 @@
         "uuid": "a2338fc7-ce61-4d61-979a-e8ad262cca17"
       }
     ],
-    "used_designators": "#PWR11",
+    "used_designators": "Q16-29",
     "variants": []
   },
   "sheets": [
-- 
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