From 3786e0f756fbfde4ea1e56f8087292df550b29f5 Mon Sep 17 00:00:00 2001 From: Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com> Date: Wed, 14 Oct 2026 12:53:39 +0100 Subject: Issues resolved --- main/issues_resolved.md | 8 -------- main/readme.md | 8 ++++++++ 2 files changed, 8 insertions(+), 8 deletions(-) delete mode 100644 main/issues_resolved.md create mode 100644 main/readme.md (limited to 'main') diff --git a/main/issues_resolved.md b/main/issues_resolved.md deleted file mode 100644 index 0e8008e..0000000 --- a/main/issues_resolved.md +++ /dev/null @@ -1,8 +0,0 @@ -## Issues -1. C1-C8, R1, SW1 and SW3 did not have a footprint. -2. The transistor did not have the correct nets due to being numbered 1, 5 and 6 rather than 1, 2 and 3. -3. 3v3 instead of +3.3V power net. -4. Input 1, Input2, Input 3 and Input 4 rather than b1, b2, b3 and 4. - -#### Credits to: -Mickey Techachokwiwat and Lutfi Cengiz for finding these issues and reporting them to me. diff --git a/main/readme.md b/main/readme.md new file mode 100644 index 0000000..0e8008e --- /dev/null +++ b/main/readme.md @@ -0,0 +1,8 @@ +## Issues +1. C1-C8, R1, SW1 and SW3 did not have a footprint. +2. The transistor did not have the correct nets due to being numbered 1, 5 and 6 rather than 1, 2 and 3. +3. 3v3 instead of +3.3V power net. +4. Input 1, Input2, Input 3 and Input 4 rather than b1, b2, b3 and 4. + +#### Credits to: +Mickey Techachokwiwat and Lutfi Cengiz for finding these issues and reporting them to me. -- cgit v1.2.3