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| author | Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com> | 2026-09-15 12:39:09 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-09-15 12:39:09 +0100 |
| commit | 255c35572463b41e6b3b34299217e39ec4dd1c09 (patch) | |
| tree | 7e8c6e5ebb276fa87722342f586cc05feeaf1d3b /README.md | |
| parent | 9cb0aa2bedc5311eb48379baa977c4da025a28b9 (diff) | |
| download | PCB-Challenge-2026-255c35572463b41e6b3b34299217e39ec4dd1c09.zip | |
Update README.md
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| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -19,7 +19,7 @@ From my own experience, no matter how much you may like designing PCBs, ultimate 1. **Logic Deduction**: deduce the digital logic function implemented by the provided schematic, purely from the schematic itself (no functional description is given). Deducing this will give you bonus points. 2. **PCB Layout**: design a fully wired, single board PCB implementation of that logic, optimised for the smallest possible board area, within the design constraints below. -This challenge will be running for 7 days, **until midnight of October the 19th.** +This challenge will be running for 7 days, **until the midnight of October 19th.** ## Design Constraints |