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| author | Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com> | 2026-10-07 12:05:31 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-10-07 12:05:31 +0100 |
| commit | 4660edd67e3046e07136ba7669ba6ba303225b0a (patch) | |
| tree | 39f46bd7fb571f9de41ececa199d90d59f8ac6ff /main/pcb_challenge_final.kicad_pro | |
| parent | aad37d160eca199ff2f4fef1be734291920d58ab (diff) | |
| download | PCB-Challenge-2026-4660edd67e3046e07136ba7669ba6ba303225b0a.zip | |
Add files via upload
Diffstat (limited to 'main/pcb_challenge_final.kicad_pro')
| -rw-r--r-- | main/pcb_challenge_final.kicad_pro | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/main/pcb_challenge_final.kicad_pro b/main/pcb_challenge_final.kicad_pro index 5678ec4..4b18639 100644 --- a/main/pcb_challenge_final.kicad_pro +++ b/main/pcb_challenge_final.kicad_pro @@ -433,6 +433,7 @@ "footprint_filter": "ignore", "footprint_link_issues": "warning", "four_way_junction": "ignore", + "global_label_dangling": "warning", "ground_pin_not_ground": "warning", "hier_label_mismatch": "error", "isolated_pin_label": "warning", @@ -506,10 +507,14 @@ }, "pcbnew": { "last_paths": { + "gencad": "", "idf": "", "netlist": "", "plot": "", + "pos_files": "", "specctra_dsn": "", + "step": "", + "svg": "", "vrml": "" }, "page_layout_descr_file": "" @@ -620,9 +625,17 @@ "meta": { "version": 1 }, + "net_format_name": "", "page_layout_descr_file": "", "plot_directory": "", "reuse_designators": true, + "space_save_all_events": true, + "spice_current_sheet_as_root": false, + "spice_external_command": "spice \"%I\"", + "spice_model_current_sheet_as_root": true, + "spice_save_all_currents": false, + "spice_save_all_dissipations": false, + "spice_save_all_voltages": false, "subpart_first_id": 65, "subpart_id_separator": 0, "top_level_sheets": [ @@ -632,7 +645,7 @@ "uuid": "a2338fc7-ce61-4d61-979a-e8ad262cca17" } ], - "used_designators": "#PWR185-186", + "used_designators": "", "variants": [] }, "sheets": [ |