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path: root/main/pcb_challenge_final.kicad_pcb
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* connect 4 pin inputshmjsp8 days1-398/+1414
* add IOs to other sidehmjsp8 days1-322/+1194
* board kind of taking shape, need to connect IOshmjsp8 days1-7377/+8379
* add previously missing footprints and connect themhmjsp8 days1-3122/+6888
* temporary commithmjsp8 days1-8841/+7820
* temporary commithmjsp8 days1-6600/+5266
* temporary commithmjsp9 days1-1014/+1341
* add most components to memoryhmjsp9 days1-1000/+1963
* checkpoint; i forgot what i even changedhmjsp9 days1-361/+723
* checkpoint; made out4 stuck and preserving before fixinghmjsp9 days1-784/+1668
* checkpoint; fully connect a bunch of componentshmjsp9 days1-3399/+5274
* connect usb-c components; start grouping and putting stuff togetherhmjsp9 days1-1484/+2936
* finish a part of the input interfacehmjsp9 days1-2184/+2698
* add all repeated layoutshmjsp9 days1-2735/+7057
* make layout and repeat for notandhmjsp9 days1-822/+990
* fix compatibility with ruleshmjsp9 days1-217/+384
* modified multflop to be compatible with ruleshmjsp9 days1-539/+611
* temporary commit; realised i can't route under ICs so preserving state before...hmjsp10 days1-2331/+2510
* fix some DRC errorshmjsp10 days1-1323/+1404
* connected some repetitive components together; commit for safetyhmjsp10 days1-45151/+50594
* Add files via uploadPaul Vincent Bezzina13 days1-309/+340
* Removed the mysterious U2Paul Vincent Bezzina13 days1-589/+1
* Fixed reported schematic and PCB issuesPaul Vincent Bezzina13 days1-2717/+4861
* Resolved issue with 3V3 and +3.3V differences on the schematicPaul Vincent Bezzina14 days1-1/+41
* Add files via uploadPaul Vincent Bezzina2026-10-071-0/+43524
* Delete main/pcb_challenge_final.kicad_pcbPaul Vincent Bezzina2026-10-071-43509/+0
* Add files via uploadPaul Vincent Bezzina2026-09-151-0/+43509
* Delete main/pcb_challenge_final.kicad_pcbPaul Vincent Bezzina2026-09-151-43635/+0
* Add files via uploadPaul Vincent Bezzina2026-09-151-0/+43635
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