| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fix compatibility with rules | hmjsp | 10 days | 1 | -217/+384 |
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| * | modified multflop to be compatible with rules | hmjsp | 10 days | 2 | -543/+611 |
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| * | temporary commit; realised i can't route under ICs so preserving state ↵ | hmjsp | 10 days | 1 | -2331/+2510 |
| | | | | | before redoing | ||||
| * | fix some DRC errors | hmjsp | 10 days | 2 | -1327/+1408 |
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| * | connected some repetitive components together; commit for safety | hmjsp | 10 days | 4 | -105226/+111154 |
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| * | Add files via upload | Paul Vincent Bezzina | 13 days | 1 | -309/+340 |
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| * | Issues | Paul Vincent Bezzina | 13 days | 1 | -1/+1 |
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| * | Issues | Paul Vincent Bezzina | 13 days | 1 | -1/+1 |
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| * | Issues | Paul Vincent Bezzina | 13 days | 1 | -1/+1 |
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| * | Update readme.md | Paul Vincent Bezzina | 13 days | 1 | -0/+2 |
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| * | Removed the mysterious U2 | Paul Vincent Bezzina | 13 days | 1 | -589/+1 |
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| * | Issues resolved | Paul Vincent Bezzina | 13 days | 1 | -0/+0 |
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| * | Issues resolved | Paul Vincent Bezzina | 13 days | 1 | -3/+8 |
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| * | Resolved issues | Paul Vincent Bezzina | 13 days | 1 | -0/+3 |
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| * | Delete main/~pcb_challenge_final.kicad_pcb.lck | Paul Vincent Bezzina | 13 days | 1 | -1/+0 |
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| * | Delete main/~pcb_challenge_final.kicad_pro.lck | Paul Vincent Bezzina | 13 days | 1 | -1/+0 |
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| * | Fixed reported schematic and PCB issues | Paul Vincent Bezzina | 13 days | 4 | -4352/+6514 |
| | | | | C1-C8, R1 and SW1 and SW3 were not assigned a footprint. Few mistakes with the net labels now resolved Transistors actually have nets. | ||||
| * | Resolved issue with 3V3 and +3.3V differences on the schematic | Paul Vincent Bezzina | 14 days | 4 | -95/+144 |
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| * | Add files via upload | Paul Vincent Bezzina | 2026-10-08 | 3 | -425/+8033 |
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| * | Add files via upload | Paul Vincent Bezzina | 2026-10-07 | 3 | -1/+96108 |
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| * | Delete main/pcb_challenge_final.kicad_pcb | Paul Vincent Bezzina | 2026-10-07 | 1 | -43509/+0 |
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| * | Delete main/pcb_challenge_final.kicad_sch | Paul Vincent Bezzina | 2026-10-07 | 1 | -49312/+0 |
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| * | Add files via upload | Paul Vincent Bezzina | 2026-09-21 | 1 | -0/+49312 |
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| * | Delete main/pcb_challenge_final.kicad_sch | Paul Vincent Bezzina | 2026-09-21 | 1 | -48411/+0 |
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| * | Delete main/delete | Paul Vincent Bezzina | 2026-09-15 | 1 | -651/+0 |
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| * | Add files via upload | Paul Vincent Bezzina | 2026-09-15 | 3 | -0/+92571 |
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| * | Rename pcb_challenge_final.kicad_pro to delete | Paul Vincent Bezzina | 2026-09-15 | 1 | -0/+0 |
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| * | Delete main/pcb_challenge_final.kicad_sch | Paul Vincent Bezzina | 2026-09-15 | 1 | -48411/+0 |
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| * | Delete main/pcb_challenge_final.kicad_pcb | Paul Vincent Bezzina | 2026-09-15 | 1 | -43635/+0 |
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| * | Add files via upload | Paul Vincent Bezzina | 2026-09-15 | 2 | -0/+44286 |
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| * | Rename pcb_challenge_final.kicad_sch to main/pcb_challenge_final.kicad_sch | Paul Vincent Bezzina | 2026-09-15 | 1 | -0/+48411 |
