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* first draftHEADmainhmjsp8 days2-2766/+4741
* nearly finished; just sorting out unconnected netshmjsp8 days2-3027/+4218
* added more or less everything except usb porthmjsp8 days2-2079/+4841
* more wiringhmjsp8 days1-761/+1354
* connect some components across pcbhmjsp8 days1-262/+3384
* connect 4 pin inputshmjsp8 days1-398/+1414
* add IOs to other sidehmjsp8 days2-323/+1195
* board kind of taking shape, need to connect IOshmjsp8 days2-7378/+8380
* add previously missing footprints and connect themhmjsp8 days2-3123/+6889
* temporary commithmjsp8 days1-8841/+7820
* temporary commithmjsp8 days2-6601/+5267
* temporary commithmjsp9 days1-1014/+1341
* add most components to memoryhmjsp9 days1-1000/+1963
* checkpoint; i forgot what i even changedhmjsp9 days2-362/+724
* checkpoint; made out4 stuck and preserving before fixinghmjsp9 days1-784/+1668
* checkpoint; fully connect a bunch of componentshmjsp9 days2-3400/+5275
* connect usb-c components; start grouping and putting stuff togetherhmjsp9 days2-1486/+2938
* finish a part of the input interfacehmjsp9 days2-2185/+2699
* add all repeated layoutshmjsp9 days1-2735/+7057
* make layout and repeat for notandhmjsp9 days1-822/+990
* fix compatibility with ruleshmjsp9 days1-217/+384
* modified multflop to be compatible with ruleshmjsp9 days2-543/+611
* temporary commit; realised i can't route under ICs so preserving state before...hmjsp9 days1-2331/+2510
* fix some DRC errorshmjsp10 days2-1327/+1408
* connected some repetitive components together; commit for safetyhmjsp10 days4-105226/+111154
* Add files via uploadPaul Vincent Bezzina13 days1-309/+340
* IssuesPaul Vincent Bezzina13 days1-1/+1
* IssuesPaul Vincent Bezzina13 days1-1/+1
* IssuesPaul Vincent Bezzina13 days1-1/+1
* Update readme.mdPaul Vincent Bezzina13 days1-0/+2
* Removed the mysterious U2Paul Vincent Bezzina13 days1-589/+1
* Issues resolvedPaul Vincent Bezzina13 days1-0/+0
* Issues resolvedPaul Vincent Bezzina13 days1-3/+8
* Resolved issuesPaul Vincent Bezzina13 days1-0/+3
* Delete main/~pcb_challenge_final.kicad_pcb.lckPaul Vincent Bezzina13 days1-1/+0
* Delete main/~pcb_challenge_final.kicad_pro.lckPaul Vincent Bezzina13 days1-1/+0
* Fixed reported schematic and PCB issuesPaul Vincent Bezzina13 days4-4352/+6514
* Resolved issue with 3V3 and +3.3V differences on the schematicPaul Vincent Bezzina13 days4-95/+144
* Add files via uploadPaul Vincent Bezzina2026-10-083-425/+8033
* Add files via uploadPaul Vincent Bezzina2026-10-073-1/+96108
* Delete main/pcb_challenge_final.kicad_pcbPaul Vincent Bezzina2026-10-071-43509/+0
* Delete main/pcb_challenge_final.kicad_schPaul Vincent Bezzina2026-10-071-49312/+0
* Add files via uploadPaul Vincent Bezzina2026-09-211-0/+49312
* Delete main/pcb_challenge_final.kicad_schPaul Vincent Bezzina2026-09-211-48411/+0
* Delete main/deletePaul Vincent Bezzina2026-09-151-651/+0
* Add files via uploadPaul Vincent Bezzina2026-09-153-0/+92571
* Rename pcb_challenge_final.kicad_pro to deletePaul Vincent Bezzina2026-09-151-0/+0
* Delete main/pcb_challenge_final.kicad_schPaul Vincent Bezzina2026-09-151-48411/+0
* Delete main/pcb_challenge_final.kicad_pcbPaul Vincent Bezzina2026-09-151-43635/+0
* Add files via uploadPaul Vincent Bezzina2026-09-152-0/+44286
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