summaryrefslogtreecommitdiff
path: root/main/issues_resolved.md
blob: 43c8a94d5368a176071af8fded04775a0118e09a (plain)
1
2
3
C1-C8, R1, SW1 and SW3 did not have a footprint. The transistor did not have the correct nets due to being numbered 1, 5 and 6 rather than 1, 2 and 3. 
3v3 instead of +3.3V power net. 
Input 1,  Input2, Input 3 and Input 4 rather than b1, b2, b3 and 4.