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| author | Paul Vincent Bezzina <109743463+Vertrex-star@users.noreply.github.com> | 2026-10-14 12:52:16 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-10-14 12:52:16 +0100 |
| commit | 536eb33888c6396f0d6b8f9ff5f3015141fa41b6 (patch) | |
| tree | 913823977480d462b0ce12c6a50599c23bb13e1b /main/issues_resolved.md | |
| parent | cfaee50808ef292fb3a283722a44f8d58ab12638 (diff) | |
| download | PCB-Challenge-2026-536eb33888c6396f0d6b8f9ff5f3015141fa41b6.zip | |
Issues resolved
Diffstat (limited to 'main/issues_resolved.md')
| -rw-r--r-- | main/issues_resolved.md | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/main/issues_resolved.md b/main/issues_resolved.md index 43c8a94..0e8008e 100644 --- a/main/issues_resolved.md +++ b/main/issues_resolved.md @@ -1,3 +1,8 @@ -C1-C8, R1, SW1 and SW3 did not have a footprint. The transistor did not have the correct nets due to being numbered 1, 5 and 6 rather than 1, 2 and 3. -3v3 instead of +3.3V power net. -Input 1, Input2, Input 3 and Input 4 rather than b1, b2, b3 and 4. +## Issues +1. C1-C8, R1, SW1 and SW3 did not have a footprint. +2. The transistor did not have the correct nets due to being numbered 1, 5 and 6 rather than 1, 2 and 3. +3. 3v3 instead of +3.3V power net. +4. Input 1, Input2, Input 3 and Input 4 rather than b1, b2, b3 and 4. + +#### Credits to: +Mickey Techachokwiwat and Lutfi Cengiz for finding these issues and reporting them to me. |