| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fix some DRC errors | hmjsp | 10 days | 1 | -4/+4 |
| * | connected some repetitive components together; commit for safety | hmjsp | 10 days | 1 | -7/+27 |
| * | Fixed reported schematic and PCB issues | Paul Vincent Bezzina | 13 days | 1 | -1/+1 |
| * | Resolved issue with 3V3 and +3.3V differences on the schematic | Paul Vincent Bezzina | 14 days | 1 | -3/+3 |
| * | Add files via upload | Paul Vincent Bezzina | 2026-10-07 | 1 | -1/+14 |
| * | Add files via upload | Paul Vincent Bezzina | 2026-09-15 | 1 | -0/+651 |
| * | Rename pcb_challenge_final.kicad_pro to delete | Paul Vincent Bezzina | 2026-09-15 | 1 | -651/+0 |
| * | Add files via upload | Paul Vincent Bezzina | 2026-09-15 | 1 | -0/+651 |
